1. Field of the Invention
The present invention relates to a film for the backside of a flip-chip type semiconductor and a dicing tape-integrated film for the backside of a semiconductor. The film for the backside of a flip-chip type semiconductor is used to protect the backside of a semiconductor element such as a semiconductor chip, and to improve the strength. The present invention also relates to a method of manufacturing a film for the backside of a flip-chip type semiconductor, and a flip-chip mounted semiconductor device.
2. Description of the Related Art
In recent years, there have been increasing demands for thickness reduction and size reduction of semiconductor devices and packages thereof. Because of that, a flip-chip type semiconductor device has been broadly used in which a semiconductor element such as a semiconductor chip is mounted on a substrate by flip-chip bonding (flip-chip connection) as a semiconductor device and a package thereof. In flip-chip connection, a semiconductor chip is fixed to a substrate in a condition that the circuit surface of the semiconductor chip is opposite to the electrode forming surface of the substrate. There are cases where damages of the semiconductor chip are prevented by protecting the backside of the semiconductor chip with a protective film in such a semiconductor device (refer to Japanese Patent Application Laid-Open Nos. 2008-166451, 2008-006386, 2007-261035, 2007-250970, 2007-158026, 2004-221169, 2004-214288, 2004-142430, 2004-072108, and 2004-063551, for example).
Furthermore, in recent years, the wiring width of power supply lines that are arranged across the whole area of the circuit surface of a semiconductor element and the space between signal lines have become narrower to correspond to demands for microfabrication and high function of semiconductor devices. Because of this, an increase of impedance and an interference between signals in signal lines of different nodes occur, which have become an impediment to sufficient performance in operating speed, the degree of operating voltage margin, and anti-electrostatic breakdown strength of the semiconductor chip.
Conventionally, a package structure in which semiconductor chips are laminated has been proposed to solve the above-described problems (refer to Japanese Patent Application Laid-Open Nos. 55-111151 and 2002-261233, for example).
On the other hand, the frequency range of an electromagnetic wave (noise) that is emitted from a semiconductor chip has become varied due to the diversification of electronic components in recent years. When the semiconductor elements are laminated as in the above-described package structure, there is a possibility that the electromagnetic wave emitted from one semiconductor chip has a bad influence on other semiconductor chips, the substrate, adjacent devices, and the package.
An electromagnetic wave shielding sheet for adhering a semiconductor element having a pressure-sensitive adhesive layer on both outermost surfaces of a laminated body consisting of an electrical insulation layer and a ferrite layer is disclosed in Japanese Patent No. 4133637. It is also described in Japanese Patent No. 4133637 that leakage of an electrical signal is attenuated by the magnetic loss characteristic of the ferrite layer of the electromagnetic wave shielding sheet for adhering a semiconductor element.
Further, a semiconductor device in which a first magnetic shielding material is arranged between a die pad and the backside of a semiconductor chip and a second magnetic shielding material is arranged on the main surface of the semiconductor chip is disclosed in Japanese Patent Application Laid-Open No. 2010-153760. It is also described in Japanese Patent Application Laid-Open No. 2010-153760 that resistance of the semiconductor device to an external magnetic field is improved.